Informazioni generali
Call: DIGITAL-JU-CHIPS-2025-CSA-DET
Tipo di azione: DIGITAL JU Coordination and Support Actions
Deadline Model: single-stage
Panoramica del bilancio
| Topic |
Budget 2025 |
Stages |
Opening Date |
Deadline |
| DIGITAL-JU-CHIPS-2025-CSA-DET - DIGITAL-JU-CSA DIGITAL JU Coordination and Support Actions |
5000000 |
single-stage |
2025-06-04 |
2025-07-30 |
Descrizione
Expected Outcome:
The core functions of DETs include, but are not limited to:
- Deployment of Electronic Design Automation (EDA) tools on the cloud: DETs will manage secured cloud instances facilitating access to essential design tools and simulation environments. To this end, DETs may contract with a cloud provider of their choice to setup this infrastructure. It is expected that prospective DETs demonstrate experience in commercial designs using tools from established EDA vendors.
- Design flow support and customisation: DETs will assist users in setting up and customising design environments and flows, ensuring smooth progression from initial setup to tape-out.
- Application engineering: DETs will offer dedicated application engineering support, addressing specific user needs and challenges throughout the development process.
- Access to Process Design Kits (PDKs): DETs will provide users with access to the necessary PDKs and ADKs for their design projects. Each DET must have legal authorisation to use and/or provide its users access to PDKs/ADKs of at least one semiconductor foundry.
- Design expertise: DETs will provide users with access to the necessary design expertise for their design projects, directly via the DET’s resources and/or through partnerships with third parties.
- Prototyping and fabrication services: DETs will facilitate prototyping and fabrication services including packaging and testing through partnerships with leading foundries or aggregators, the Chips for Europe Initiative pilot lines or other relevant pilot lines. Each DET must have already established direct or indirect relationships with at least one semiconductor foundry, enabling efficient communication and ensuring technology advice and support to its users.
Aggiornamenti
04 June 2025
The submission session is now available for: DIGITAL-JU-CHIPS-2025-CSA-DET
Condizioni generali e documenti
Conditions
1. Admissibility Conditions: Proposal page limit and layout
described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.
Proposal page limits and layout: described in Part B of the Application Form available in the Submission System and described in the Appendix 6 CEI of the Work Programme of the Chips JU and in the Guide for Applicants from the Call documents section.
2. Eligible Countries
described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.
3. Other Eligible Conditions
described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.
4. Financial and operational capacity and exclusion
described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.
5a. Evaluation and award: Submission and evaluation processes
described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.
5b. Evaluation and award: Award criteria, scoring and thresholds
described in Appendix 6 CEI of the 2025 Work Programme of the Chips JU.
5c. Evaluation and award: Indicative timeline for evaluation and grant agreement
Evaluation 01-12/09/2025
Grant Agreement 01/03/2026
Call document and annexes:
Additional documents:
Partecipazione
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Approfondimenti
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